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By Willy M Sansen

This booklet is entitled Analog layout necessities since it includes all issues of value to the analog dressmaker that are necessary to receive adequate insights to do a radical activity.

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Extra info for Analog Design Essentials (The Springer International Series in Engineering and Computer Science)

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The Source-Bulk capacitance C is normally shorted SB out. 0169 At very high frequencies, for example beyond f /3, the T input impedance cannot be modeled by a simple Gate resistor R and input G capacitances C and C . GS GD It can be corrected by a small capacitance shunting resistor R . This capaciG tance is normally obtained by fitting the measured input impedance, obtained from s-parameters, to the model. This usually leads to a reduction of the Gate resistor R (here to 1/3) G and a shunt capacitor, which is a fraction (here 1/5) of the input capacitance.

The absolute value of the current and the transconductance then become so small that the noise becomes too large. Noise will be explained in detail in Chapter 3. Small values of the current inevitably lead to larger noise and smaller signalto-noise ratios (SNR). For SNR values below 40 dB, weak inversion can be used. Sensor interface and biomedical preamplifiers are comfortable with this. Communication amplifiers usually require more than 70 dB SNR. As a result we have to stay in the region between weak and strong inversion.

Indeed in a bipolar transistor, the input voltage is scaled to kT/q rather than to (V −V )/2. GS T We now gain a factor of about 4! The other reason for larger gain is the slightly higher value of the V parameter. E 54 Chapter #2 027 At higher frequencies, the voltage gain will fall off as a result of all capacitances. There are three positions where a capacitance can occur. Normally the load capacitance is the largest one, as it consists of all interconnect capacitance to the next stage and the feedback capacitances applied (as in switched-capacitance filters).

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